| 1. IC Design Engineer/Senior Engineer/Manager ( location: Hsinchu Science Park) |
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1.1 Bachelor of Science in Electrical Engineering or other relevant discipline, with 2 years plus experience.
1.2 Verilog coding and digital circuit design experience is preferred.
1.3 Comfortable with FPGA and Custom IC design
1.4 Familiar with MPEG 1/2/4, H.264, WMV and other relevant compression techniques.
1.5 Image Processing(Scaling & De-interlace) Algorithm with IC design relevant background
1.6 Understanding of de-interlacer, scalar and TV encoder is preferred |